Xilinx has unveiled its latest data center accelerator, the Alveo U55C, which it says is the most powerful accelerator yet thanks to a memory swap.
For the most part, the Alveo U55C with FPGA is similar to its predecessor, the Alveo U280. But the U280 has 8GB of HBM2 memory and 16GB of DDR4 DRAM, while the U55C comes with 16GB of HBM2 memory and no DDR4. HBM2 is considerably faster and more expensive than DDR4 memory.
By going to all HBM2s and eliminating DDR4, Xilinx can increase performance and greatly reduce power and size. The Alveo U55C card has a single-slot, full-height, half-length (FHHL) form factor versus the full-height, full-length, double-width form factor of the U280. It also has a much lower power consumption, 150W versus 215W.
The smaller form factor provides more compute density in the same space, suitable for creating dense clusters based on Alveo accelerators. It is designed for high-density streaming data, high I / O math, and scale-out applications like big data analytics and artificial intelligence.
“We are changing Alveo’s position in the data center,” said Nathan Chang, HPC product manager at Xilinx, “and it is no longer just for niche architectures or very specific data problems. The goal is to create Alveo clusters. denser, scale to target HPC workloads. That’s why we created this card. “
The U55C offers support for RDMA over Converged Ethernet (RoCE) v2 and Message Passing Interface (MPI) integration. HPC application developers can use the Xilinx Vitis software platform to build scale-out applications that span multiple Alveo cards, regardless of the server platforms and network infrastructure used.
Xilinx says that RoCE v2, 200Gbps bandwidth, and Vitis API-driven clustering allow an Alveo network to compete with InfiniBand on performance and latency without network provider lockdown. The Vitis platform and tools make hardware more accessible to software developers and data scientists without requiring hardware expertise. Vitis supports leading artificial intelligence frameworks such as Pytorch and Tensorflow, as well as high-level programming languages such as C, C ++, and Python.
As part of the briefing, Chang spoke about a use case from an HPC customer, Australia’s national scientific agency, CSIRO, and the Square Kilometer Array Observatory (SKA) of 131,000 radio antennas that he is building. A group of 420 Alveo U55C cards processes the signal in real time from the data collected from the antennas, with a total throughput of 15 TB.
Scaling across multiple Alveo U55C cards, performance with SKA tools increased fivefold over x86 CPUs, while requiring half the number of servers and less than half the power compared to GPUs basic, according to Xilinx.
The Xilinx Alveo U55C is available through the company website or from authorized Xilinx distributors. It will also be available through public cloud-based FPGA-as-a-service providers for remote evaluation, as well as through select colocation data centers for private previews. General availability is not expected until the second quarter of next year.
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